29 XTC_SIM_RNG_SCHED = 0,
30 XTC_SIM_RNG_STEAL = 1,
31 XTC_SIM_RNG_PLACE = 2,
32 XTC_SIM_RNG_LOCKVIC = 3,
34 XTC_SIM_RNG_FAULT = 5,
36 XTC_SIM_RNG_BUGGIFY = 7,
59int __xtc_sim_active(
void);
67void __xtc_sim_nondeterminism(
const char *what);
68void xtc_sim_strict(
int on);
69int xtc_sim_nondeterminism_count(
void);
84void xtc_sim_clock_skew(int64_t offset_ns,
int jitter_ns);
88void xtc_sim_activate(uint64_t seed);
89void xtc_sim_deactivate(
void);
94uint64_t __xtc_sim_rng(
int s);
98uint64_t __xtc_sim_rng_range(
int s, uint64_t bound);
108int xtc_sim_fault(
unsigned pct_per_1000);
124void xtc_sim_fault_points_enable(
unsigned pct_per_1000);
125void xtc_sim_fault_points_disable(
void);
126int xtc_sim_fault_point(
const char *name);
127uint64_t xtc_sim_fault_point_fires(
const char *name);
128int xtc_sim_fault_points_seen(
void);
144void xtc_sim_io_faults_enable(int64_t lat_min_ns, int64_t lat_max_ns,
145 unsigned fault_pct_per_1000);
146void xtc_sim_io_faults_disable(
void);
147int __xtc_sim_io_faults_active(
void);
148int64_t __xtc_sim_io_latency(
void);
149int __xtc_sim_io_should_fault(
void);
169void xtc_sim_io_corrupt_enable(
unsigned corrupt_pct_per_1000);
170void xtc_sim_io_corrupt_disable(
void);
171int __xtc_sim_io_corrupt_active(
void);
172int __xtc_sim_io_torn_prefix(
int full_len);
173int __xtc_sim_io_flip_byte(
int len);
185void xtc_sim_io_enospc_enable(
unsigned pct_per_1000);
186int __xtc_sim_io_enospc(
void);
201void xtc_sim_io_stale_enable(
unsigned pct_per_1000);
202void __xtc_sim_io_stale_record(
int fd, uint64_t off,
const void *buf,
int len);
203int __xtc_sim_io_stale_read(
int fd, uint64_t off,
void *buf,
int len);
223void xtc_sim_io_wb_enable(
int on);
224void __xtc_sim_io_wb_wrote(
int fd, uint64_t end_off);
225void __xtc_sim_io_wb_synced(
int fd);
226uint64_t xtc_sim_io_durable_end(
int fd);
252void xtc_sim_partition_set(
int src_loop_id,
int dst_loop_id,
int blocked);
253void xtc_sim_partition_isolate(
int loop_id);
254void xtc_sim_partition_clear(
void);
255int __xtc_sim_partition_blocked(
int src_loop_id,
int dst_loop_id);
256void xtc_sim_net_latency(int64_t min_ns, int64_t max_ns);
257int64_t __xtc_sim_net_latency(
void);
263#if defined(XTC_INJECT_DISABLE)
264# define XTC_SIM_FAULT_POINT(name) ((void)0)
266# define XTC_SIM_FAULT_POINT(name) ((void)xtc_sim_fault_point(name))
287void xtc_sim_buggify_enable(
unsigned pct_per_1000);
288void xtc_sim_buggify_disable(
void);
289int xtc_sim_buggify(
const char *name);
290int xtc_sim_buggify_active_count(
void);
291int xtc_sim_buggify_reached_count(
void);
292int xtc_sim_buggify_site(
int idx,
char *buf,
size_t buflen,
294int xtc_sim_buggify_fault(
unsigned pct_per_1000);
299#if defined(XTC_INJECT_DISABLE)
300# define XTC_SIM_BUGGIFY(name) (0)
302# define XTC_SIM_BUGGIFY(name) xtc_sim_buggify(name)
308void xtc_sim_clock_enable(int64_t start_ns);
309void xtc_sim_clock_disable(
void);
310void xtc_sim_clock_advance(int64_t delta_ns);
311void xtc_sim_clock_set(int64_t ns);
315int __xtc_sim_vclock(int64_t *out_ns);
331int xtc_sim_exec_run(
struct xtc_exec *e, uint64_t seed,
long max_steps);
341int xtc_sim_check(
struct xtc_exec *e);
342uint64_t xtc_sim_state_hash(
struct xtc_exec *e);
362void xtc_sim_sched_pessimal(
unsigned pct_per_1000);
363int __xtc_sim_sched_pessimal_pct(
void);
383void xtc_sim_swizzle_enable(
unsigned pct_per_1000);
384void xtc_sim_swizzle_disable(
void);
385int __xtc_sim_swizzle_pct(
void);
401typedef int (*xtc_sim_consistency_fn)(
void *arg);
402void xtc_sim_set_consistency_check(xtc_sim_consistency_fn fn,
void *arg);
403int __xtc_sim_run_consistency_check(
void);